Design Engineer

Infotech Sourcing - Redmond, WA

Job Title: Design Engineer - 818696

Location: Redmond, WA

Duration:6+ months

Duties: Digital Data Path Engineer to implement custom data path module for ASIC and FPGA designs.

RESPONSIBILITIES
Implement algorithm blocks as RTL code as defined in the Micro Architecture
Implement RTL using HLS and System Verilog
Support DV team for verification of blocks
Assist with synthesis and timing closure
Work with FPGA engineers to perform early prototyping
Support handoff and integration of blocks into larger SOC environments
Assist with Algorithm analysis, verification and improvement
Contribute to ASIC digital architecture, design and verification
Ability to document and communicate clearly

Skills:
5-8 years of experience as a Digital Design Engineer
Experience with HLS Catapult tool is a big plus but not a must
Experience in RTL coding, Lint/CDC tools, synthesis and LEC tools

PREFFERED QUALIFICATIONS
HLS coding using Catapult and Xilinx Vivado tools
System Verilog OVM/UVM DV experience
Python (or similar) scripting experience
ASIC design experience
Masters Degree in EE

Education: BS Electrical Engineering/Computer Science or equivalent experience



Posted On: Thursday, August 2, 2018



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