front-end ASIC Lead Design Engineer (Santa Clara, CA)
LaBine & Associates
- Santa Clara, CA
Unique opportunity to join an established international company in their US expansion. Working from the US headquarters in Santa Clara, you will have the ability to be an impact player working with other exceptionally talented people. The Front-End ASIC Design Engineer will be a key person in this growing design department.
Great opportunity to work on current, ongoing, and upcoming new projects.
Job Description | Primary responsibilities include:
- Support customer’s design through all phases of ASIC execution.
- Ensure that designs meet product performance requirements by performing related tasks. Contribute to microarchitecture, RTL design, synthesis, and timing closure.
- Ensure deadline for project milestones are met.
- Work effectively with internal teams, including the verification team and physical design team.
- Display a results-focused attitude and accomplish Company/Team-goals.
- Bachelor’s Degree in EE or similar degree.
- 3-8 years of professional design experience.
- Hands-on ASIC front-end design, ideally in design services environments (product backgrounds acceptable).
- Skills Required – Micro-architecture at module/sub-system/chip-level; digital design of complex modules/sub-systems, with solid understanding of clock-domain crossings; integration of IPs/modules/sub-systems designed by internal/external teams; experience using AMBA bus protocols; System Verilog experience; Lint and CDC analysis; timing analysis; excellent debug skills; customer support.
- Teamwork, dedication, collaborative, strong communications and interpersonal skills.
- Ability to meet stringent deadlines and project timelines.
- Skills Desired - Experience in at least few of these: CPU (preferably, ARM), or GPU, or DSP; low-power design and verification; peripheral interfaces such as CSI, I3C, USB, PCIe; FPGA.
- Experience dealing with international teams in a small company environment is desired.
Thursday, June 18, 2020