Sr Digital Design Verification Engineer (Cambridge, MA)
LaBine & Associates
- Cambridge, MA
Our Client is seeking a motivated and experienced Senior Verification Engineer to tackle novel verification challenges in FPGAs and ASICs.
In this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications.
Be part of a team that is developing the next generation of digital and embedded hardware platforms.
- BS degree with 6 years’ experience
- Fluent in SystemVerilog including SVA
- Recent experience with UVM
- Familiarity with at least one major industry simulator (Questasim, Xcelium, VCS)
- Firm grasp of constrained-random and coverage-driven verification
- Experienced with scripting languages such as Python, Perl, Bash and more
- Albe to work in a Linux environment
- Experience with Formal Analysis. Strong analytical and problem-solving skills
- Active Secret Clearance
- Experience leading verification teams
- Experience with analog or mixed-signal simulations (AMS)
Thursday, April 16, 2020